Indium-gallium-zinc oxide (IGZO) devices, such as IGZO thin-film transistors (TFTs) have attracted a considerable amount of attention due to the associated low cost, room temperature manufacturing processes with good uniformity control, high mobility for high speed operation, and the compatibility with transparent, flexible, and light display applications. Due to these attributes, IGZO TFTs may even be favored over low cost amorphous silicon TFTs and relatively high mobility polycrystalline silicon TFT for display device applications.
Manufacturing IGZO TFTs often involves the use of an etch stop layer to protect the IGZO channel during the etch process used to define the source and drain electrodes (or regions), which adds to overall costs. When an etch stop layer is not used, the device is sometimes referred to as a “back-channel-etch” (BCE) device.
BCE device manufacturing requires a source/drain patterning step with a high (etch) selectivity of the source/drain material over the IGZO layer during the source/drain patterning, and minimal damage to the IGZO surface, which may impact the performance of the TFT. Currently, few options exist for performing this process on IGZO devices, which utilize inexpensive, readily available materials.